An asynchronous data transfer and source traffic control system includes a bus master (100) and a plurality of bus users (112, 114, 116) coupled to a bidirectional data bus (120-128).
During the grant field, the bus master (100) grants access to a selected bus user (112, 114, 116) for the entire data portion of the next frame.
A bus master disables the CPU and takes control of the system bus during a DMA data transfer.
During the request field, any number of bus users (112, 114, 116) may request access which is received by the bus master (100).
Which user (112, 114, 116) is granted access to the next frame is determined according to an arbitration algorithm in the bus master (100) which may be unknown to the bus users (112, 114, 116).
The driver forwards the request to the bus manager.
The inner class representation handles the request from the device driver using the same procedures as the bus manager, and appears to the driver as the bus manager itself.
An inner class representation of the bus manager is generated and the identity of the driver is determined.
According to the invention, access to elements within a bus system or network may be controlled whereby an external device (100) identifies itself by means of a device-specific code with a bus or network manager (300).
A bus manager then informs all other devices connected to the vehicle communications network that this device has been removed from said vehicle communications network.
The newly integrated device is either identified by a message sent by the latter to the bus manager, or by an initialisation phase triggered by said newly integrated device.
The device can disconnect itself or be disconnected by the bus manager, if no data communication with the device takes place for a predetermined time period.